The present invention relates generally to peripheral-component-interconnect (PCI) interfaces, and more specifically, to selectively purge a PCI input/output (I/O) translation-lookaside buffer.
A peripheral-component-interconnect (PCI) interface may transfer data between main storage and the PCI function's storage by means of direct-memory-access (DMA) read/write requests. A DMA operation initiated by a PCI function may be targeted to one of several DMA address spaces in main storage. The PCI virtual address used by the DMA operation undergoes a dynamic address translation into an absolute address within the configuration to which the PCI function is attached. The I/O subsystem may provide a high-speed cache of past PCI address-translations, reducing the number of main-storage accesses needed to perform subsequent translations. Such a cache is generally referred to as a translation-lookaside buffer (TLB). During the life of a PCI DMA address space, translation parameters (e.g., region-table entries, segment-table entries, and page table entries) used by the PCI address-translation mechanism may need to be altered by the operating system. However, since the I/O subsystem may have cached translation parameters used in past translations, the operating system is required to purge any TLB entries corresponding to the altered translation table entries.
Conventional operating systems utilize a refresh PCI translation (RPCIT) instruction to purge any TLB entries that were formed from translation tables and their entries. After altering a translation table used by a PCI function, the operating system may execute the RPCIT instruction to purge any cached TLB information from past translations. However, the length of the PCI virtual address range to which the purge applies does not necessarily have to reflect the true length of the underlying translation parameters in the TLB. In addition to an I/O TLB purging operation, the RPCIT instruction is currently defined to initiate an operation known as PCI synchronization. When executing the conventional RPCIT instructions, a combination of firmware and hardware are forced to execute the PCI synchronization after performing each refresh operation.